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ČVUT WORKSHOP'2007

Analytical modelling of linear codes
Author: Ivan Šimeček
Keywords

High-performance,  cache hierarchy, sparse matrix-vector multiplication.


Abstract

Algorithms for the sparse matrix-vector multiplication (shortly SpMV) are important building blocks in solvers of sparse systems of linear equations. Due to matrix sparsity, the memory access patterns are irregular and the utilization of a cache suffers from low spatial and temporal locality. To reduce this effect, the register blocking formats were designed. This paper introduces a new combined format, for storing sparse matrices that extends possibilities of the diagonal register blocking format.

 

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BibTex entry:
@inproceedings{JA_WOR_07_REG,
author ="{\v S}ime{\v c}ek",
title ="A New Format for the Sparse Matrix-vector Multiplication ",
journal ="Proceedings of Workshop 2007",
publisher = {CTU},
address = {Prague},
year ="2007",
isbn ="978-80-01-03667-9",
Address ="Prague, Czech Republic"
}

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